Rigid PCB

Material: Rigid uses fiberglass, flexible uses polyimide. Structure: Rigid cannot bend, flexible can flex. Application: Rigid for stable connections, flexible for compact spaces.

Single-layer, double-layer, multi-layer. Single-layer has circuits on one side; double-layer on both; multi-layer connects conductive layers via vias (e.g., motherboards).

Desktop computers, TVs, industrial control, automotive electronics (in-vehicle computers), aerospace non-vibration components, etc.

Lower cost. Rigid PCBs have mature processes and cheap materials; flexible PCBs are expensive due to complex materials and processes.

Common FR4 substrates: -55°C to 125°C for normal use, short-term 260°C for lead-free soldering. Special materials can withstand higher temperatures.

From a few cm² (small control boards) to several m² (large server motherboards).

Depends on size, layers, and materials. FR4 multi-layer boards: ~1-3 kg/m², heavier than flexible PCBs of the same area.

10-20+ years in normal environments; shortened to years in harsh conditions (high temperature/humidity).

FR4 has a flexural modulus of ~100-200MPa, much lower than flexible PCBs. Increasing thickness enhances stress resistance.

FR4 (fiberglass epoxy), phenolic resin, epoxy resin; PTFE for special high-frequency applications.

Good electrical insulation, mechanical properties, and dimensional stability. CTE: 13-17ppm/℃. Low cost and mature processes.

Low decomposition temperature (120-150°C), prone to delamination during soldering, poor electrical/mechanical properties, high CTE, and odorous.

Forms conductive traces for current flow. Common thicknesses: 0.5oz (17μm), 1oz (35μm), 2oz (70μm). Thick foils for high-current applications.

Insulates to prevent short circuits, protects copper from oxidation and physical damage, and distinguishes areas by color (e.g., green, blue).

Prints characters/symbols for component identification during production and debugging. Common color: white; also gray, red, black, yellow, etc.

FR4: Low cost for general use. High-frequency materials (e.g., PTFE): Low signal loss for 5G. Ceramic substrates: High thermal conductivity for high-heat applications.

Consider electrical (high frequency/high voltage), mechanical (vibration), temperature, and cost. Use FR4 for consumer electronics, PTFE for high-frequency, and ceramics for high-heat.

RoHS: Restricts hazardous substances (lead, mercury, etc.). Halogen-free: Br/Cl <900ppm, total <1500ppm to reduce toxic gases.

Low-CTE materials improve dimensional stability. High thermal conductivity enhances heat dissipation. High-performance insulators reduce signal loss, enabling miniaturization and high performance.

Signal integrity (impedance matching, anti-reflection/crosstalk), power distribution, grounding, and current-carrying capacity.

Shorten signal traces, minimize vias. Use differential pairs for high-speed signals and control impedance. Power/ground planes with solid copper. Partition modules to avoid interference. Line width based on current.

Size based on thickness/current (thicker boards need larger vias). Minimize via count. Back-drilling for high-speed signals to remove stubs.

Matching source, transmission line, and load impedances to reduce reflection. Achieved by controlling line width, spacing, dielectric thickness, and permittivity (e.g., 0.33mm width for 50Ω microstrip on FR4).

Partition components; keep sensitive parts away from noise sources. Power/ground planes in multi-layer boards for shielding. Ground planes around high-speed signals. Decoupling capacitors; optimized grounding.

Functional partitioning, separate heat-sensitive components, place high-frequency components close, prioritize large components, and ensure easy installation/maintenance.

Adjacent power and ground planes to reduce inductance. Voltage with via connections. Solid copper for power planes; thicken high-current paths.

Thermal vias and copper planes under hot components. High thermal conductivity substrates. Airflow design; add heat sinks/fans if needed.

Hole position: ±0.1mm. Plated vias: ±0.076mm. Non-plated vias: ±0.05mm. Line width: ±10%-20%.

Altium Designer (suitable for small-to-medium designs), Cadence Allegro (high-speed multi-layer), Mentor PADS (user-friendly and efficient).

Panelizing → Drilling → Copper deposition → Imaging → Plating → Etching → Solder mask → Silkscreen → Surface finish → Profiling.

Issues: Rough walls, burrs, broken drills. Solutions: Replace drills, optimize speed/feed, inspect materials.

Role: Conductivize hole walls for layer connection. Controls: Solution composition, temperature (25-35°C), pH (11-12), pretreatment cleanliness.

Photolithography: High precision for HDI, high cost and complex. Screen printing: Low cost/simple equipment, lower precision.

Control via current density, plating time, and solution concentration. E.g., 1oz (35μm) requires 20-30 minutes at 2-3A/dm².

Control etchant concentration, temperature, time, and spray pressure, and maintain equipment regularly. High concentration may cause over-etching, while low concentration leads to incomplete etching. Keep temperature at 45-55℃, determine time based on board thickness, etc., and ensure uniform pressure for full contact.

Uniformly cover the circuit without missing printing, pinholes, or bubbles. Oil thickness on copper surface: 10-18μm, via: 5-8μm. Appropriate spacing from circuit edges to prevent excessive pad coverage or short-circuit risks.

Characters should be clear, complete, with good color contrast, accurately positioned without blocking key areas, and have strong adhesion (select suitable inks and curing processes).

HASL: Low cost, good solderability, limited flatness. ENIG: Smooth, good solderability and corrosion resistance, high cost. Immersion tin: Good solderability, smooth surface, shelf life. OSP: Low cost, simple process, short solderability retention.

Mechanical cutting (high precision, suitable for complex large sizes). Punching (high efficiency, suitable for regular mass production). Laser cutting (extremely high precision, high cost, suitable for fine small batches). Choose based on shape, precision, batch size, and cost.

Inspect dimensions/thickness after cutting. Check hole position, size, and wall after drilling. Test copper thickness/uniformity after plating. Inspect circuit integrity after etching. Check printing quality of solder mask/characters. Test coating thickness/adhesion after surface finishing. Inspect shape/edges after molding.

Use flying probe testers or ICT equipment. Flying probe suits small batches/varieties, detecting opens/shorts, etc. ICT is for mass production, fully testing electrical performance with special fixtures.

Detect via connectivity, voids, copper integrity in multilayer boards. Check BGA solder joints and internal defects (foreign matter, delamination) non-destructively.

Collect images via optical cameras and compare with standards to detect defects like missing components, misalignment, shorts. Applied in real-time inspection after printing, placement, reflow soldering to improve efficiency and quality.

Bend test (observe cracks at specified angles/cycles). Drop test (simulate impacts). Vibration test (simulate vibrations to check soldering and structure).

Per IPC-4552, ENIG suits high-frequency/high-reliability (Ni: 3-5μm, Au: 0.05-0.1μm). OSP is low-cost (film thickness: 0.2-0.5μm, suitable for short-term storage). HASL is mature (Sn thickness >2.5μm, poor flatness).

Adjust solution concentration (acidic etchant: CuCl₂ 180-220g/L, HCl 1.0-1.5mol/L), temperature 50-55℃. For excessive under-etching, reduce speed and increase spray pressure to 2-3bar.

Per IPC-6012, general multilayer boards ≤75μm, HDI boards ≤50μm. Laser drilling positioning accuracy ±25μm, controlled with high-precision exposure machines.

FR-4 material: longitudinal ≥345MPa, transverse ≥276MPa (ASTM D790). 1.6mm thickness ≥300MPa.

Metallographic sectioning (IPC-TM-650, through-hole ≥20μm, blind/buried via ≥18μm). XRF non-destructive testing (accuracy ±0.5μm).

Preheat: 90-130℃ (60-120s). Soldering zone: 240-260℃ (contact 2-4s). Cooling rate: 3-6℃/s (J-STD-003).

Conventional: 15-30μm (IPC-6012), dense areas ≥20μm. Screen printing: 20-25μm, light curing: 15-20μm.

Conventional: 6/6mil (0.1524mm). LDI + chemical etching: 3/3mil (0.0762mm). HDI boards: 1/1mil (0.0254mm).

For conductivity, choose resin plugging (depth ≥80% via depth, flatness error ≤10μm). For insulation only, choose covering (coverage width ≥0.1mm).

Per IPC-J-STD-033, bake at 125℃ for 4-8h (≤1.6mm: 4h, ＞1.6mm: 8h) to reduce moisture content below 0.1%.

Higher roughness enhances skin effect and signal loss. RTF foil Ra＜0.5μm (suitable for high frequency >10GHz). VLP foil Ra＜0.3μm (loss reduction 15%-20%).

Deburring machine brushing (pressure 0.3-0.5MPa, speed 2-3m/min). Chemical micro-etching (sodium persulfate 100-150g/L, 40-50℃, 1-2min).

General: single-ended ±10%, differential ±8%. High-speed (>1Gbps): single-ended ±5%, differential ±3%, adjusted via line width, dielectric thickness, copper thickness.

Per UL 796, FR-4 material ≥1400V/mm at 25℃/50% RH. Creepage distance 1mm corresponds to 100-200V.

Minimum line width/spacing, hole diameter/pad ratio (pad ≥hole +0.4mm when hole ≥0.3mm), copper area ratio (30%-70%), drill aspect ratio (≤8:1), solder mask bridge width (≥0.1mm).

Causes: CTE mismatch, uneven thickness, improper temperature curve. Solutions: Select CTE ≤15ppm/℃ materials, control thickness tolerance ±0.05mm, optimize heating rate ≤3℃/s.

Per IPC-TM-650, ≥10¹⁰Ω after 168h at 85℃/85% RH, ≥10¹²Ω for high-end applications, requiring surface cleanliness control.

Blind vias: Laser/mechanical drilling + plating, depth ≤0.5mm, for surface interconnection. Buried vias: Mechanical drilling + lamination, requiring alignment, for inner-layer signals to reduce parasitic parameters.

Flying probe: Coverage >98%, suitable for small batches/high density, slow (3-5s/point). Bed-of-nails: Fast (<1s/point), high cost, coverage 85%-95%, suitable for mass production.

Each 1oz (35μm) increase raises thermal conductivity by 38%. 3oz foil in high-power applications reduces temperature rise by 15%-20% with thermal vias.

Conventional: 0.1mm. High-density boards with LDI: 0.075mm, preventing soldering bridging.

Uneven solder on pads, insufficient via soldering, uneven surface. Control solder